DRAM, on the other hand, cannot hold its state for more than a fraction of a second. Battery backed SRAM can hold its state for years off of a single 3V button battery. To enable very low power sleep, SRAM is used due to its ability to maintain its contents with extremely low power consumption. Many embedded applications are power constrained, and as a result many microcontrollers are built so that they can be put into a very low power sleep state.
Additionally, economies of scale drive down the cost of separate RAM chips more so than more specialized microcontrollers. Testing large RAM arrays is also time consuming and so including large arrays will increase testing costs. Large RAM arrays are also more likely to develop faults simply due to their large area, decreasing yield and increasing costs. Producing DRAM on a microcontroller die would mean you would need to trade off the process optimization somehow. Making low leakage transistors results in slower transistors, which is a fine trade-off for DRAM readout electronics, but would not be so good for building high performance logic. Making the capacitors requires special processing. DRAM requires area-efficient capacitors and very low leakage transistors. Not CPUs or other logic, just straight up DRAM. There are semiconductor foundaries that are more or less dedicated to producing DRAM. RAM arrays should be optimized in different ways than logic, and it is not possible to send different parts of the same chip through different processes - the whole chip must be manufactured with the same process.
Larger silicon area has a 'double whammy' effect on price: larger chips mean less chips per wafer, especially around the edge, and larger chips means each chip is more likely to get a defect. This means that increasing the amount of RAM directly increases the silicon area of the chip and hence the cost. First of all, memory takes up a lot of silicon area.
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